Computer Architecture

Computer architecture is a specification detailing how a set of software and hardware technology standards interact to form a computer system or platform. In short, computer architecture refers to how a computer system is designed and what technologies it is compatible with. As with other contexts and meanings of the word architecture, computer architecture is likened to the art of determining the needs of the user/system/technology, and creating a logical design and standards based on those requirements.

The ______ format is usually used to store data.
The Input devices can send information to the processor.
The I/O interface required to connect the I/O device to the bus consists of ______
The time delay between two successive initiation of memory operation _______
The instruction -> Add LOCA, R0 does _______
Which registers can interact with the secondary storage?
______ is used to choose between incrementing the PC or performing ALU operations.
The registers, ALU and the interconnection between them are collectively called as _____
The main virtue for using single Bus structure is ____________
ANSI stands for __________
The main advantage of multiple bus organisation over a single bus is _____
The ISA standard Buses are used to connect ___________
During the execution of the instructions, a copy of the instructions is placed in the ______
SPEC stands for _______
CISC stands for _______
Two processors A and B have clock frequencies of 700 Mhz and 900 Mhz respectively. Suppose A can execute an instruction with an average of 3 steps and B can execute with an average of 5 steps. For the execution of the same instruction which processor is faster?
The addressing mode which makes use of in-direction pointers is ______
Add #45, when this instruction is executed the following happen/s _______
The effective address of the following instruction is MUL 5(R1,R2).
_____ addressing mode is most suitable to change the normal sequence of execution of instructions.
For the addition of large integers, most of the systems make use of ______
In the implementation of a Multiplier circuit in the system we make use of _______
Which method/s of representation of numbers occupies a large amount of memory than others?
The most efficient method followed by computers to multiply two unsigned numbers is _______
The type of memory assignment used in Intel processors is _____
_____ method is used to map logical addresses of variable length onto physical memory.
To get the physical address from the logical address generated by CPU we use ____
Physical memory is divided into sets of finite size called as ______
The technique used to store programs larger than the memory is ______
The Load instruction does the following operation/s,
The BOOT sector files of the system are stored in _____
The transfer of large chunks of data with the involvement of the processor is done by _______
Which of the following technique/s used to effectively utilize main memory?
The two phases of executing an instruction are __________
RTN stands for ___________
In a system, which has 32 registers the register id is ____ long.
The Instruction fetch phase ends with _________
____ converts the programs written in assembly language into machine instructions.
The purpose of the ORIGIN directive is __________
The last statement of the source program should be _______
When dealing with the branching code the assembler ___________
The order in which the return addresses are generated and used is _________
Subroutine nesting means,
The most Flexible way of logging the return addresses of the subroutines is by using _______
The wrong statement/s regarding interrupts and subroutines among the following is/are ______
i) The sub-routine and interrupts have a return statement
ii) Both of them alter the content of the PC
iii) Both are software oriented
iv) Both can be initiated by the user
The reserved memory or private space of the subroutine gets deallocated when _______
The private space gets allocated to each subroutine when _________
_____ the most suitable data structure used to store the return addresses in the case of nested subroutines.
The process wherein the processor constantly checks the status flags is called as
The advantage of I/O mapped devices to memory mapped is ___________
We describe a protocol of input device communication below:
i) Each device has a distinct address.
ii) The BUS controller scans each device in a sequence of increasing address value to determine if the entity wishes to communicate
iii) The device ready to communicate leaves its data in the I/O register
iv) The data is picked up and the controller moves to the step a
Identify the form of communication best describes the I/O mode amongst the following:
____ register is used for the purpose of controlling the status of each interrupt request in parallel priority interrupt.
The program used to find out errors is called
In Breakpoint mode of operation
When the process requests for a DMA transfer
The Centralised BUS arbitration is similar to ______ interrupt circuit
The classification of BUSes into synchronous and asynchronous is based on
The devices with variable speeds are usually connected using asynchronous BUS.
Your new question!
The Interface circuits generate the appropriate timing signals required by the BUS control scheme.
The PCI follows a set of standards primarily used in _____ PC’s.
The key features of the SCSI BUS are _________
In USB the devices can communicate with each other.
______ is used as an intermediate to extend the processor BUS.
The disadvantage of using a parallel mode of communication is ______
The transformation between the Parallel and serial ports is done with the help of ______
Circuits that can hold their state as long as power is applied is _______
The number of external connections required in 16 X 8 memory organisation is _____
To reduce the number of external connections required, we make use of ______
To get the row address of the required data ______ is enabled.
The difference between DRAM’s and SDRAM’s is/are ________c
The chip can be disabled or cut off from an external connection using ______
In a SDRAM each row is refreshed every 64ms.
In SDRAM’s buffers are used to store data that is read or written.
The original design of the RAMBUS required for ________ data lines.
The controller multiplexes the addresses after getting the _____ signal.
The difference between the EPROM and ROM circuitry is _____
RAMBUS is better than the other memory chips in terms of ________
In the memory hierarchy, as the speed of operation increases the memory size also increases.
If we use the flash drives instead of the harddisks, then the secondary storage can go above primary memory in the hierarchy.
The reason for the implementation of the cache memory is ________
The copy-back protocol is used ________
The input and output of the registers are governed by __________
For a 3 BUS architecture, is the below code correct for adding three numbers?
PCout, R = B, Marin, READ, Inc PC
WMFC
MDRout, R = B, IRin
R4outa, R5outb, Select A, ADD, R6in, End
There exists a separate block consisting of various units to decode an instruction.
The disadvantage/s of the hardwired approach is ________
The name hardwired came because the sequence of operations carried out is determined by the wiring.
Highly encoded schemes that use compact codes to specify a small number of functions in each micro instruction is ________
The logic operations are implemented using _______ circuits.
Your new question!
The multiplicand and the control signals are passed through to the n-bit adder via _____
The decimal numbers represented in the computer are called as floating point numbers, as the decimal point floats through the number.
The sign followed by the string of digits is called as ______
Each stage in pipelining should be completed within ____ cycle.
The ______ plays a very vital role in case of super scalar processors.
In super-scalar mode, all the similar instructions are grouped and executed together.
The computer architecture aimed at reducing the time of execution of instructions is ________
Which of the architecture is power efficient?
For converting a virtual address into the physical address, the programs are divided into _____
ARM stands for _____________
The computer cluster architecture emerged as a result of ____

Be the first to comment

Leave a Reply